1. Field of the Invention
The present invention relates to computer-enabled trace width verifying systems and methods, and particularly to a system and method for verifying trace widths of a printed circuit board (PCB) layout.
2. Background of the Invention
Computer chip sizes are continuing to be miniaturized, and electrical signals thereof are being clocked at ever increasing frequencies. Even more that previously, high-speed, high-frequency signals being driven between chips via traces on a PCB are liable to detrimental impedance effects. One manifestation of these impedance effects is unwanted reflections due to impedance mismatches. The high-speed, high-frequency signals may also be prone to cross-talk and electromagnetic interference (EMI).
EMI is an electrical disturbance in an electronics-based system. EMI can be caused by natural phenomena such as lightning, by low-frequency waves emitted from electromechanical devices such as motors, or by high-frequency waves emitted from integrated circuits and other electronic devices such as routers. In the United States, the Federal Communications Commission sets limits on the EMI output of electronic devices. Other countries set their own limits on the EMI output of electronic devices. It is therefore necessary for all parties involved in the fabrication, manufacture, and/or sale of electronic devices to comply with the limitations imposed. In particular, it is necessary for manufacturers to ensure that EMI emissions of electronic devices in use are at or below the maximums imposed in relevant jurisdictions.
Trace widths on a PCB is a parameter affecting EMI emissions. In particular, the wider the trace width is, the more intense the EMI emissions are. Therefore, when constructing a PCB layout, it is necessary to verify the trace widths to insure that the EMI emissions caused by the traces meet the requirements imposed in the relevant jurisdiction(s). Additionally, such verification should be performed before the final physical layout of the PCB is determined, in order to avoid or minimize the difficult and expensive process of rectifying failed trace widths.
Accordingly, there is a need for a system and method for verifying trace widths of a PCB layout, in which verification is fast and inexpensive, and can be performed as early as possible in the design process.